consider a TSI for a system with four timeslots per frame. Draw a block diagram- it should have four 2-bit words, eight 8-bit words, and a 3-bit binary counter. Walk the TSI through three consecutive frames of incoming data. Label the data in 12 consecutive incoming timeslots: A through L. Let the switching assignment be such that data from incoming timeslot 0 is output in timeslot 0, data from incoming timeslot 1 is output in timeslot 3, data from incoming timeslot 2 is output in timeslot 1, and data from incoming timeslot 3 is output in timeslot 2. For each timeslot, show on the block diagram the incoming data stream, the state of the address counter, the state of the read address, the contents of the RAM, and the outgoing data stream.