Consider a lower-performance version of the Sobel accelerator, dealing with video frames of 320 × 240 8-bit pixels at a rate of 15 frames per second. Repeat the analysis of Example 9.6 to determine a suitable approach to memory accesses for this version of the accelerator.
Example 9.6
Suppose the memory in which the original and derivative images are stored is 32 bits wide, and that each 8-bit byte is individually addressed. Video frames are stored with one byte per pixel. The pixels of a row in a frame are stored from left to right at successive addresses, and rows are stored top to bottom, one after another in memory. Each memory read or write access takes 20ns, consisting of two cycles of a 100MHz system clock. Can the memory access data fast enough?