Consider a byte-addressable computer that has 4-KB main memoryand 64-byte cache with eight blocks, where each block has two 32-bit words. While executing some program, the CPU reads 32-bit words from the sequence of 10 addresses shown below (in hexadecimal format):098 094 250 09C 254 20C 258 208 250 090Show the cache contents (e.g., [000] = contents stored at address 000) at the endof this sequence and calculate the corresponding miss rate given that:
(a) Cache is direct-mapped.
(b) Cache is 2-way set-associative (2 blocks per set) with LRU replacement.
(c) Cache is fully-associative with LRU replacement.