Response to the following question:
An NMOS differential pair operating at a bias current I of 100 μA uses transistors for which k1n 200 μA/V2 and W/L = 10. Find the three components of input offset voltage under the conditions that ? RD/RD = 4%, ? (W/L)/(W/L) = 4%, and ?Vt = 5 mV. In the worst case, what might the total offset be? For the usual case of the three effects being independent, what is the offset likely to be?