(Combinational Integer Multiplier) Draw the schematic for a 3-bit com- binational multiplier designed using partial product accumulation. (A,B are 3-bit inputs and S is a 6-bit output.) Use half/full adders in addi- tion to logic gates to build the circuit. Also include two additional inputs (SA,SB) and one output SS to denote the sign of A,B, and S. The sign bits are 0 for positive numbers and 1 for negative numbers. (Sign and Magnitude Numbers) The inputs are SA A2, A1, A0, SB, B2, B1, and B0. The outputs are SS, S5, S4, S3, S2, S1, and S0.