Change the asynchronous-clear circuit to a


Change the asynchronous-clear circuit to a synchronous-clear circuit in the register of Figure. The modified register will have a parallel-load capability and a synchronous-clear capability, but no asynchronous-clear circuit. The register is cleared synchronously when the clock pulse in the CP input goes through a negative transition provided R and S - 0 in all the flip-flops.

1392_Asynchronous-Clear-Circuit.jpeg

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Computer Engineering: Change the asynchronous-clear circuit to a
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