Problem
Gate oxide thickness in 1µm CMOS is 20 nm. On S/D areas, it is thinned during gate polyplasma etching, but re-grown during poly oxidation. Calculate the oxide thickness under the following assumptions:
- poly etch rate is 250 nm/min;
- poly thickness is 250 nm;
- Si:SiO2etch selectivity is 20:1;
- overetch time is 20 s;
- re-oxidation is 900 ?C, 10 min (dry).
The response should include a reference list. Double-space, using Times New Roman 12 pnt font, one-inch margins, and APA style of writing and citations.