Assignment:
Problem 1
A 4H-SiC p+-n-p transistor has impurity concentrations (dopants) of 2.0x1017 and 2x1016 cm-3 in the base and collector regions, respectively. The base width WB = 0.5 mm, and the device cross-section area Ar =10μm x 10μm.
The bulk recombination centers/cm3 is 1.0x1015 located close to E1, and the electron and hole capture cross-sections is 2x 10-15 cm2.
(a) If the emitter-base junction is forward biased to 2.8 V and the collector-base junction is also forward biased to 2.5V, calculate, the terminal currents 1E, IC and IB.
(b) For part (a) calculate the common Emitter current gain: (i) using the equation for β and (ii) using the equation β=IC/IB. Compare the two values for β and explain why they two calculations agree or do not agree.
(c) If the device was operating in the active region with VE=2.8V and VR=-20V, Calculate β. Did the value of β increase, decrease or remained the same?
![1705_P 10.jpg](https://secure.tutorsglobe.com/CMSImages/1705_P 10.jpg)
Problem 2:
A 4H-SiC n-channel MOSFET with substrate doping NA=1x1016 cm-3, a Titanium Gate metal, Si02 insulator, and oxide thickness of 100 A° has been fabricated The total oxide charge Qox=5x1010 qC/cm2 (Neglect other oxide charges), the gate length is 1 um, and the gate width is 20 Find Wmax VFB, VT, the current at VG=2V and VG= 5V, and the saturation current for the device at VG=5V. (You may search the internet for constants that were not given).
Problem 3
You are asked to design a 4H-SiC p-MOSFET, which will be fabricated on the same chip with the n-MOSFET of problem 1. The 4H-SiC p-MOSFET will be used with the device of Problem 1 to build a CMOS logic gate (See Figure below). Therefore, both devices should have the same gate oxide material, oxide thickness, and oxide charge density. Since the p-MOSFET requires n-type region, such region was implanted to produce doping of lx1015 cm-3.
(a) Calculate VT.
(b) (b) If we need saturation current IDss= 10 mA at VG =-5V, what will be the gate width Z, if you choose L= 1 μm.