Question: By how many bits should the immediate field of an I-type instruction be reduced to match the length on an R-type instruction for the follow modifications to the MIPS architecture?
a) [ISA-A] 8 general purpose registers.
b) [ISA-B] 128 general purpose registers.
c) Given ISA-A and ISA-B describe programs that are more efficiently encoded with one rather than the other.
Please show me all the working and provide the answer.