A switch-tail counter uses the compliment of the serial output of a right-shift register as its serial input.
(a) Starting from an initial state of 000, list the sequence of states after each shift until the register returns to 000.
(b) Beginning in a state 00...0, how many states are there in the count sequence of an n-bit switch-tail counter?
(c) Design a decoder to be driven by the counter that produces a one-hot code output for each of the states. Make use of the don't-care states in your design.
The don't-care states are 010, 100, and 101 because they aren't present in the sequence of states, right? I'm just confused as to how you would design part "c." Isn't the output of a decoder always one-hot?