A set-dominant master-slave Flip-Flop has set and reset inputs. It differs from a conventional master-slave SR Flip-Flop in that, when both S and R are equal to 1, the Flip-Flop is set.
(a) Obtain the state table of the set-dominant Flip-Flop.
(b) Find the state diagram for the set-dominant Flip-Flop.
(c) Design the set-dominant Flip-Flop by using an SR Flip-Flop and logic gates (including inverters).