a. A finite state recognizer or sequence detector has one input (X) and one output (Z). The output is asserted high (Z=1) whenever the input sequence 1101 has been observed during the past four clock cycles, as long as 1110 has never been observed. Draw the state diagram for the finite state recognizer. (Overlapping good sequences are allowed.)
b. Present one possible state assignment for your recognizer of part a.
c. A state diagram for a particular finite state machine requires a total of 70 states. What is the minimum number of flip-flops that can be used to implement this finite state machine?