A digital circuit uses two 74LVC2G74 D-FFs operating at VCC =2.5 V. (The PRE and CLR are deactivated.) The D input to one of theFFs is driven by the Q-bar output of the same FF. The D input tothe other FFs is driven by an XOR gate. The inputs to the XOR gateare the Q outputs of the two FFs. Both FFs are clocked by the sameclock signal. If the propagation delay of the XOR gate is 8 ns,what is the maximum clock frequency of this circuit?