a 4-bit synchronous counter uses flip-flops with
A 4-bit synchronous counter uses flip-flops with propagation delay times of 15 ns each. The maximum possible time required for change of state will be ?
Ans. 15 ns since in synchronous counter all the flip-flops change state at the similar time.
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the ad converter whose conversion time is independent of the number of bits is ans parallel conversion is the ad converter whose conversion time is
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in digital ics schottky transistors are preferred over normal transistors because of their ans lower propagation delay in digital ics
the following switching functions are to be implemented using a decoderf1 sum m1 2 4 8 10 14 f2 sum m2 5 9 11 f3 sum m2 4 5 6
a 4-bit synchronous counter uses flip-flops with propagation delay times of 15 ns each the maximum possible time required for change of state
words having 8-bits are to be stored into computer memory the number of lines required for writing into memory are ans 8-bit words needed 8 bit
in successive-approximation ad converter offset voltage equal to 12 lsb is added to the da converters output this is done to ans it is done to reduce
the decimal equivalent of binary number 11010 is ans 11010 1 x 24 1 x 23 0 x 22 1 x 21
1s complement representation of decimal number of -17 by using 8 bit representation is ans 1710 100012in 8 bit 000100011s complement
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