A 16-k nmos ram with the cell design shown in figure -
A 16-K NMOS RAM, with the cell design shown in Figure (b), is to dissipate no more than 200 mW in standby when biased at VDD = 2.5 V. Design the width-to-length ratios of the transistors and the resistance value. Assume VT N= 0.7 V and = 35 μA/V2.
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= 35 μA/V2.