1 draw the state diagram for the state machine


1) Draw the state diagram for the state machine described by Table 7.5 in the text. Note, the table shows the transition to the next state S* from the current state S for the next set which is one of the five possible states: INIT, A0, A1, OK0 and OK1 for the two inputs A and B.
Table 7-5 State and output table
present
state
S 00 01
INIT A0 A0
A0 OK0 OK0
A1 A0 A0
OK0 OK0 OK0
OK1 A0 OK0
AB
11 10 Z
A1 A1 0 A1 A1 0 OK1 OK1 0 OK1 A1 1 OK1 OK1 1 next state S*
2) Draw the state diagram for a binary counter that counts from 0 to 7 and then returns to 0. The counter will increment each time the input is a 1. It will stay in the current state while the input is 0. When the counter is at a count of 7, the output will be a 1 as the counter transitions back to state 0. For all other state transitions, the output will be a zero. Hint, you will want to design this using a state diagram for a Mealy machine where the output is specified on the arch showing the transition to the next state for a given input since the output is a 1 only during the transition from state 7 to state 0. Remember, the arch has the notation input/output showing the input that causes the transition described by the arch from state i to state j and the output value corresponding to that arch.
3) Design a clocked sequential circuit to detect the serial input pattern 1110. The input sequence is from left to right, i.e. the 1 on the left is the first input in the sequence and the 0 is the last input in the sequence. The circuit will have two outputs. The first output will be a 1 after the string 11 is seen. The second output will be 1 only after the entire string has been seen. So, in your design you will have two output variables and need a kmap for each output as well as the two state variables. Use D-Flip flops. Show all of your work, the state diagram, the state table, the transition table, the excitation table, the k-maps, the equations and the circuit diagram. Hint, again we will want to draw a Mealy state diagram. See the sequence detector designed in lecture 7 as a similar example.

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Electrical Engineering: 1 draw the state diagram for the state machine
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