Design and analysis of an IC adder built using discrete logic and a dedicated adder using Integrated Circuits
a) Design a full adder using logic gates. In the design process show truth tables, karnaugh maps and other material used to derive the final logic circuit.
b) Build the resulting circuit on a breadboard. Write down the tests one would perform to verify correct operation of the adder system.
c) From the circuit designed in a, calculate the maximum propagation delay of the circuit. Build a table with the propagation delays if the adder is built using the following logic families
d) Hence using the previous results calculate the delay needed when a 16 bit ripple adder is built and comment on the results.
e) Find an integrated circuit that functions as an adder and wire it as a 16 bit adder and simulate the resulting circuit using Proteus. Describe how this circuit could be tested to verify correct operation. Using the relevant datasheet calculate the maximum propagation delay.
f) Compare and comment on the efficiency of solutions presented in d and e for a 16 bit adder.
g) There are several techniques to make them faster. Describe two techniques that can be used to make faster adding circuits.
h) Present the 1st page only of the datasheet of each component used in solving task 1 as evidence that the appropriate datasheets have been referenced.