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SDRAM stand for Synchronous dynamic random access memory, is dynamic random access memory (DRAM) which is synchronized with the system bus. Classic DRAM contains an asynchronous interface that means that it responds as rapidly as possible to alter in control inputs. SDRAM contain a synchronous interface, meaning that it waits for clock signal before responding to control inputs and is thus synchronized with the computer's system bus. The clock is employed to drive an internal finite state machine that pipelines incoming commands. The data storage area is separated into several banks, letting the chip to work on several memory access commands at time, interleaved among the separate banks. This let higher data access rates than an asynchronous DRAM.